Vertical Gate RF SOI LIGBT for SPICs with Significantly Improved Latch-Up Immunity
نویسندگان
چکیده
منابع مشابه
Reliability concern and design for the lateral insulator gate bipolar transistor based on SOI substrate
In this paper, the reliability issues of the lateral insulator gate bipolar transistor based on SOI substrate (SOI-LIGBT), including the anode punch-through, the terminal early breakdown, the hot-carrier degradation and the latch-up failure, have been experimentally investigated and improved. The measurement results and the T-CAD simulations demonstrate that the proposed device owns higher reli...
متن کاملComparison of Single-Gate SOI & Multi-Gate SOI MOSFETs
This article presents the comparison of SingleGate SOI and Multi-Gate SOI MOSFETs. In the first part we have presented two main fundamental problems of the “ultimate” (sub-10-nm) MOSFET scaling of Single-Gate geometry: the exponential growth of power consumption and sensitivity to fabrication uncertainties. These factors have played the decisive role in for eventual transfer of the CMOS industr...
متن کاملCompact Model for Multiple-Gate SOI MOSFETs
In this work we present compact modelling schemes, for the undoped nanoscale multiple-gate MOSFET, suitable for design and projection of these devices. The proposed models have a physical basis and assume well-tempered multiple-gate MOSFETs; i.e., transistors with small shortchannel effects. We have considered different transport models (drift-diffusion and quasi-ballistic models); each one is ...
متن کاملSOI RF Switch for Wireless Sensor Network
The objective of this research was to design a 0-5 GHz RF SOI switch, with 0.18um power Jazz SOI technology by using Cadence software, for health care applications. This paper introduces the design of a RF switch implemented in shunt-series topology. An insertion loss of 0.906 dB and an isolation of 30.95 dB were obtained at 5 GHz. The switch also achieved a third order distortion of 53.05 dBm ...
متن کاملDesign of Double Gate Vertical MOSFET using Silicon On Insulator (SOI) Technology
Received April 27, 2012 Revised May 14, 2012 Accepted May 26, 2012 Application of symmetric double gate vertical metal oxide semiconductor field effect transistors (MOSFETs) is hindered by the parasitic overlap capacitance associated with their layout, which is considerably larger than for a lateral MOSFET on the same technology node. A simple process simulation has been developed to reduce the...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: VLSI Design
سال: 2011
ISSN: 1065-514X,1563-5171
DOI: 10.1155/2011/548546